hexforge / error codes
Error and warning codes
The constructs the compiler rejects or warns on, with the code it prints and the reasoning behind each decision. This is the same data the tools emit (/api/rejected.json); the table filters in your browser, and reads in full without JavaScript. An E-code stops the build; a W-code does not.
The compiler rejects rather than ignores: an unsupported construct is a hard error with a line number, never silently dropped hardware. The two constructs that are ignored rather than rejected - system tasks (W302) and a delay inside an initial (W301) - are here too, marked as warnings.
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| Code | Construct | Category | Planned | Reason |
|---|---|---|---|---|
E118 | defparam | language | not planned | Order-dependent and awkward to elaborate. Use parameter overrides in the instantiation. |
E121 | hierarchical names in expressions | language | not planned | The design is flattened early, so a cross-module reference has nothing to resolve against. |
E130 | specify blocks, path delays | language | not planned | Only meaningful for simulation and cell libraries. |
E131 | user-defined primitives | language | not planned | Table-driven primitives are a simulation feature. |
E134 | wand, wor, trireg, tri0, tri1 | language | not planned | No resolved-net modelling exists in the netlist format. |
E136 | gate primitives beyond and/or/not/xor/buf | language | not planned | nmos, pullup, rtran and relatives have no mapping on these devices. |
E142 | real and time variables | language | not planned | Floating-point has no hardware here; use fixed-point integers. |
E150 | delays in assignments (#n) | language | not planned | Timing comes from the delay table, not the source; a # delay is dropped only in an initial, see W301. |
E156 | casex | language | not planned | The don't-care matching of casex hides priority bugs in hardware. Use casez, which warns. |
E161 | four-state literals (1'bx, 1'bz) outside tri-state IO | semantics | not planned | The netlist is two-state; x and z have no storage. |
E170 | unpacked arrays deeper than one level | synthesis | planned | Multi-dimensional memories are not inferred yet; planned alongside BRAM cascades. |
E181 | multiple drivers on a net | synthesis | not planned | A resolved wire needs tri-state modelling the format does not have. |
W204 | unconstrained clock-domain crossing | warning | - | The path is reported but excluded from slack; constrain it with set_false_path or set_max_delay. |
W214 | array not inferred as block RAM | warning | - | Names the array and the reason; usually an asynchronous read or an odd width. |
W301 | delay in an initial block | warning | - | The # delay is ignored rather than rejected; initial sets a power-on value only. |
W302 | system task ignored ($display, $finish) | warning | - | System tasks are accepted and dropped so testbench-flavoured code still elaborates. |
error codes · from rejected.json · limitations in prose · tool reference